128Mb: x16 Mobile SDRAM
Timing Diagrams
Timing Diagrams
Figure 32:
Initialize and Load Mode Registers
T0
T1
Tn + 1
To + 1
Tp + 1
T q + 1
Tr + 1
C LK
( (
) )
( (
) )
t C K
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
t C K S t C KH
C KE
( (
) )
( (
) )
t C M S t C MH
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
C OMMAND 1
( (
) )
( (
) )
NOP
PRE
( (
) )
( (
) )
AR
( (
) )
( (
) )
AR
( (
) )
( (
) )
LMR
( (
) )
( (
) )
LMR
( (
) )
( (
) )
VALID
( (
) )
( (
) )
DQM
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
t A S t AH
A0-A9, A11
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
C ODE
( (
) )
( (
) )
C ODE
( (
) )
( (
) )
VALID
( (
) )
( (
) )
A10
BA0, BA1
( (
) )
( (
) )
( (
) )
( (
) )
ALL BANK S
t A S tAH
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
C ODE
t A S t A H
BA0 = L,
BA1 = L
( (
) )
( (
) )
( (
) )
( (
) )
C ODE
L
BA0 = L,
BA1 = H
( (
) )
( (
) )
( (
) )
( (
) )
VALID
VALID
( (
) )
( (
) )
( (
) )
( (
) )
DQ
( (
) )
Hi g h-Z
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
T = 100μs
t RP
t RF C 2
t RF C 2
t MRD 3
t MRD 3
Power-up:
V DD an d
C LK sta b le
Pre c har g e
all b anks
Loa d Mo d e
Re g ister
Loa d Exten d e d
Mo d e Re g ister
DON ’ T C ARE
Notes:
1. PRE = PRECHARGE command, AR = AUTO REFRESH command, LMR = LOAD MODE REGISTER
command.
2. Only NOPs or COMMAND INHIBITs may be issued during t RFC time.
3. At least one NOP or COMMAND INHIBIT is required during t MRD time.
PDF: 09005aef8237e877/Source: 09005aef8237e8d8
128Mb_x16 Mobile SDRAM_Y25M_2.fm - Rev. C 2/07 EN
46
Micron Technology, Inc., reserves the right to change products or specifications without notice.
?2006 Micron Technology, Inc. All rights reserved.
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